Softworld, Inc.
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http://www.softworldinc.com
http://www.softworldinc.com
USD
85
95
HOUR
true
Job Title: Digital Design Engineer
Job Location: Linthicum, MD 21090
Onsite Requirements:
Job Description:
Roles and Responsibilities:
Basic Qualifications:
Preferred Qualifications:
**3rd party and subcontract staffing agencies are not eligible for partnership on this position. 3rd party subcontractors need not apply.
Due to the nature of the work, a United States Government Clearance is required to be eligible for the position. **
Digital Design Engineer - Active Secret Clearance
Posted: 05/15/2024
2024-05-15
2024-06-21
Employment Type:
Contract
Industry: Engineering
Job Number: BBBH76668_1715795525
Pay Rate: US$85 - US$95 per hour
Job Description
Job Title: Digital Design Engineer
Job Location: Linthicum, MD 21090
Onsite Requirements:
- Digital design experience
- FPGA
- ASIC32
Job Description:
Roles and Responsibilities:
- As a Digital Design Engineer, you will have a challenging and rewarding opportunity to be a part of our Enterprise-wide digital transformation.
- The selected individual will work on FPGA or ASIC Design across the full product life cycle process.
- In this capacity, you will utilize your working knowledge of digital design, signal processing and digital interfaces.
- This candidate will have an ability to operate in a team environment and collaborate across the different teams as required to accomplish the goals.
Basic Qualifications:
- BS in Electrical Engineering or another STEM (Science, Technology, Engineer, Mathematics) discipline
- 9+ years of digital design engineering experience
- Working knowledge of full product life cycle (requirements, design, implementation, and test) of FPGA Design and/or ASIC Design
- Knowledge of System Verilog, Verilog and/or VHDL
- S. Citizenship is required for all positions.
- An ACTIVE DoD Secret level or higher security clearance and ability to obtain SAP (Special Access Program) clearance
Preferred Qualifications:
- Experience with industry standard FPGA design implementation tools for IP integration, PnR, CDC
- Experience with industry standard ASIC front-end design tools for synthesis, LEC, CDC
- Experience with STA constraints generation and timing closure.
- Experience with MATLAB, Mentor Graphics design tools, Synopsys, or similar tool.
- Familiarity with Xilinx and Intel FPGA technology
**3rd party and subcontract staffing agencies are not eligible for partnership on this position. 3rd party subcontractors need not apply.
Due to the nature of the work, a United States Government Clearance is required to be eligible for the position. **
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